1. Field of Invention
The present invention relates to a memory device. More particularly, the present invention relates to a memory device having 3-D NAND strings.
2. Description of Related Art
There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM) and flash memory. Flash memory devices become popular sources of non-volatile memories and are widely used in the personal computers, personal digital assistants (PDAs), digital cameras, digital media players, cellular phones and removable memory modules. Moreover, a NAND memory device is the common type of flash memory device. The array of memory cells of NAND flash memory devices is arranged in a form that the control gate of each of the memory cells of the row of the array is connected to the a word line. Columns of the array include strings (i.e. NAND strings) of memory cells which are connected in series between the selection lines including source side selection line and string selection line. Currently, with the demands of higher capacity and smaller size of non-volatile memories, a non-volatile memory device including a 3-D NAND string stack structure has been developed.
In the conventional 3-D NAND string stack structure, the bit lines, the string selection line, the word lines, the source side selection line and the source line are configured in the substrate or the material layer below the stacked semiconductor layers which are used to form NAND strings thereon. That is, the string selection line, the word lines and the source side selection line are formed in the substrate or the material layer before the semiconductor layers are deposited and are patterned. According to the manufacturing process, the bit lines, the string selection line, the word lines, the source side selection line and the source line cannot be made of metal material because of contamination issue and low thermal budget after the deposition of the metal layer. Thus, the bit lines, the string selection line, the word lines, the source side selection line and the source line are made of doped polysilicon instead of metal material. Hence, the sheet resistance of the line cannot be reduced. Therefore, the speed of programming operation and reading operation is slow.
Moreover, after the semiconductor layers and the charge trapping layers are formed, the vertical gates are formed to couple the memory cells of the NAND strings to the word lines under the semiconductor layers. However, the formation of the contact holes of the vertical gates must be done without miss-alignment to the word lines underneath the semiconductor layers. Therefore, the line pitch and spaces between the word lines are limited and are unable to be scaled down.